Programmable logic plays a role in the design of base stations

With the proliferation of subscriptions for wireless services, the variety of service types, and the lower cost of portable devices accessing the Internet, the need for increased infrastructure capacity is increasingly evident. 3G smart phones, 3G netbooks, and 3G tablets are the main drivers of explosive demand for wireless data services and base station capacity. Superimposing performance on existing wireless broadband devices, such as HSPA+ and EV-DO (ie, 3G+), has solved some of the need for data throughput, but due to slow service speeds, wireless service providers still suffer from user accusations, especially In big cities, the dissatisfaction of users is even more serious.

Wireless operators have plans to develop higher-bandwidth services, such as LTE and LTE-Advanced, to meet this challenge; however, it will take several years to deploy these 4G technologies, but at the same time, the data throughput requirements It keeps rising. When global "desktop" wireless broadband service demand is ubiquitous (according to industry analysts predict that this phenomenon will occur in the next 6 years), wireless service providers will still face pressure to increase the density of base stations. The substantial increase in infrastructure requirements and fierce competition in the local market will place base station OEMs under pressure to increase prices.

Increase capacity with lower power consumption and price - is it myth or reality?

In the past, higher performance Base Transceiver Stations (BTSs) in the telecommunications industry typically required more power and a higher total cost of ownership. However, this situation is expected to change in the future. In Asia and Africa, Green field 3G and enhanced deployment of 3G will lead to cruel and energy price pressures, which is likely to spread to the entire wireless infrastructure market. For wireless infrastructure OEMs, the key is to maintain and enhance profitability by reducing the cost of base station component materials. As shown in Figure 1, one way to reduce the cost of component materials is to move from a traditional, single base station deployment to a distributed deployment model.

Figure 1 - Evolution of Base Station Networks

This topology solves some of the challenges mentioned above, and also promotes the use of SERDES-based logic devices and the maturation of applications for such devices to support fiber data from RRUs (radio frequency remote units) to BTSs. transmission. However, due to the radio frequency and data conversion equipment included in the RF remote unit, the cost still accounts for a large portion of the total cost of the BTS's component materials. A new class of lower-cost, low-power FPGAs, such as the LatTIceECP3 devices, can be combined with SERDES integrated with CPRI and OBSAI baseband interfaces to provide flexible data processing capabilities and reduce the overall cost of RF remote units. However, the need to increase data throughput has brought all aspects of the traditional parallel data converter interface to its limits, such as performance, the complexity of the printed circuit board layout and manufacturing costs, and the effort required to maintain data integrity. These challenges have caused the SERDES functionality between the actual RRU data converter and the data processing FPGA to migrate from the BTS interface to the digital data/control interface, as shown in Figure 2. The JEDEC JC-16 Association released an open industry standard for this new type of interface in 2008, called JESD204A, and brought great hope for further reducing the cost of the components and components of the RF remote unit.

Figure 2 - JESD204A Interface

Figure 2 - JESD204A Interface

Currently, the JESD204A interface on the CGVTM data converter provided by NXP Semiconductors is a high-speed serial interface that uses CML-compatible differential signals and 8B/10B encoding. The current maximum data rate is 3.125 Gbps, and any size of system bandwidth is achieved through multiple channels between the data converter and the FPGA, achieving a data rate of more than 312.5 megabytes per second per channel. Because JESD204A supports accurate over-the-line synchronization, it also supports orthogonal sampling, which is necessary for 3G and 4G air interfaces based on OFDM modulation mechanism. The advantages of SERDES-based data converters and FPGAs

Programmable logic and high-speed data conversion technology play a very important role in the entire evolution of base station design. The data converter provides a bridge between the RF power amplifier and the RF small signal portion of the wireless communication unit, and the FPGA provides the designer with enough flexibility so that the design can begin before the air interface specification is fully established.

The increasing demand for base station data throughput has led to an increase in component costs and power consumption of wireless communication units, and has made the associated printed circuit boards and interfaces more complex while placing greater emphasis on signal integrity requirements. Data converters that are compatible with JESD204A have the advantage of reducing component material costs and other commercial and technical advantages, making BTS OEMs unable to ignore this new, groundbreaking interface choice. The ever-saving cost of component materials quickly exceeds the cost of adopting the interface technology, and also improves the reliability of the system, thereby further saving costs.

JEDEC JESD204A greatly reduces the BOM cost of RF remote units by simplifying PCB layout. Simplification of PCB layout reduces board size while reducing PCB size, both adding circuitry Board cost is an important factor. In addition, because JESD204A greatly reduces the number of interface signals between the data converter and the FPGA, the reliability of the entire system is enhanced. Because the low-voltage swing CML reduces power consumption, the component material cost of the power supply may also be reduced accordingly. JESD204A not only helps to reduce the cost of component materials, but also greatly benefits the system architecture level of the design. Powerful embedded protocols (without software overhead), including data scrambling, single-bit error detection, and loss detection of data line synchronization, as well as enhanced isolation of analog and digital components on the RF printed circuit board, improve noise immunity. Many industry observers believe that the conversion of the data conversion interface to JESD204A is unavoidable, just like the conversion of USB, PCI Express and Serial RapidIO high-speed serial in the PC and DSP hardware areas.

Just as with data converters, higher requirements for cost, power, and performance have also forced significant changes to the FPGA fabric, significantly improving its performance, features, and logic density. Compared with ASICs, FPGAs have long been widely acclaimed for their flexibility and faster time-to-market, but in the past, FPGAs were used only for "interface logic" and "fix bugs" applications. Now that the value of FPGAs has greatly expanded, this situation has changed. For example, Lattice's new family of low-cost, low-power FPGAs with enhanced features such as integrated SERDES, DSP data paths and embedded memory has become an important part of many RF remote unit designs. System design engineers now only need to spend half the power and cost, use this highly competitive SERDES-capable FPGA to use this programmable platform in complex signal path applications such as digital down conversion (Digital Down conversion, DDC), digital conversion (digital Up conversion, DUC), crest factor reduction (crest factor reducTIon, CFR) and digital pre-distortion (digital pre-distorTIon, DPD) function.

summary

BTS OEMs need to seriously consider using the new JESD204A high-speed serial interface to save component BOM costs and other costs for the RF remote unit as an important means to cope with the downward pressure on the increasing wireless infrastructure ASP in the future.

In the past, FPGAs and data converters played a key role in the design of RF remote units; today, they play a greater role in reducing system construction costs. SERDES-based, scalable interface provides a seamless JESD204A between a plurality of ADC / DAC, and a plurality of the FGPA, simplified, low power consumption and cost data highway. Feature-rich, lower-cost FPGAs enable faster time-to-market and shorter cost recovery cycles, and provide the flexibility to more effectively respond to changing standards. System design engineers now also have an exciting, improved set of tools to address the challenges of the evolving wireless broadband market.