Summary of embedded system knowledge and interface technology

1. What is embedded?

IEEE (Institute of Electrical and Electronics Engineers) defines embedded systems: "Devices for controlling, monitoring, or assisting in the operation of machines and equipment." Originally: Devices Used to Control, Monitor or Assist the Operation of Equipment, Machinery or Plants).

An embedded system is a specialized computer system that is part of a device or device. Typically, an embedded system is an embedded processor control board in which the control program is stored in ROM. In fact, all devices with digital interfaces, such as watches, microwave ovens, video recorders, and automobiles, use embedded systems. Some embedded systems also include an operating system, but most embedded systems implement full control from a single program. logic.

Defined from the application object, the embedded system is a combination of software and hardware, and can also cover auxiliary devices such as machinery. The embedded system generally recognized in China is defined as: application-centered, computer-based, software and hardware tailored to meet the strict requirements of the application system for functions, reliability, cost, size, power consumption and other special computer systems.

An embedded system device generally consists of an embedded computer system and an execution device. The embedded computer system is the core of the entire embedded system, and is composed of a hardware layer, an intermediate layer, a system software layer, and an application software layer. The execution device, also known as the controlled object, can accept control commands issued by the embedded computer system to perform the specified operations or tasks. The actuator can be very simple, such as a tiny motor on the phone, which is turned on when the phone is in vibration receiving state; it can also be complicated, such as the SONY smart robot dog, which integrates multiple micro-small control motors and various sensors. Thereby, various complicated actions and various state information can be performed.

2, the composition of the embedded system

First, the hardware layer

The hardware layer includes an embedded microprocessor, memory (SDRAM, ROM, Flash, etc.), general device interface, and I/O interface (A/D, D/A, I/O, etc.). Adding a power circuit, a clock circuit and a memory circuit based on an embedded processor constitutes an embedded core control module. The operating system and applications can be hardened in ROM.

Second, the intermediate layer between the hardware layer and the software layer is the middle layer, also known as the Hardware Abstract Layer (HAL) or the Board Support Package (BSP). The semi-system upper layer software is separated from the underlying hardware. Open, so that the underlying driver of the system is independent of the hardware, the upper software developers do not need to care about the specific conditions of the underlying hardware, and can be developed according to the interface provided by the BSP layer. This layer typically contains initialization of the underlying hardware, input/output operations of the data, and configuration capabilities of the hardware device. In fact, BSP is a layer of software between the operating system and the underlying hardware, including most of the hardware modules in the system that are closely related to the hardware. Designing a complete BSP requires two parts of the work: the BSP function of the hardware initialization of the embedded system, and the design of the hardware-related device driver. Third, the system software layer The system software layer consists of real-time multi-tasking operating system (RTOS), file system, graphical user interface (GUI), network system and general component modules. RTOS is the foundation and development platform for embedded applications.

3, real-time system

(1) Definition: A system that can perform system functions and respond to external or internal, synchronous or asynchronous time within a specified or determined time. (2) Difference: The general system generally pursues the average response time of the system and the user's convenience; while the real-time system mainly considers the system behavior in the worst case. (3) Features: time constraint, predictability, reliability, and interaction with the external environment. (4) Hard real-time (strong real-time): It means that the time requirement of the application should be fully satisfied, otherwise it will cause major security accidents and even cause major loss of life and property and ecological damage, such as: aerospace and military. (5) Soft real-time (weak real-time): Although some applications have time requirements, real-time tasks occasionally violate this requirement and will not have serious impact on system operation and environment, such as monitoring system and real-time information collection system. (6) Task constraints include: time constraints, resource constraints, execution order constraints, and performance constraints.

5, real-time system scheduling

(1) Scheduling: Given a set of real-time tasks and system resources, determine the entire process of when and where each task is executed. (2) Preemptive scheduling: usually priority-driven scheduling, such as uCOS. The advantage is that the real-time performance is good, the response is fast, the scheduling algorithm is relatively simple, and the time constraint of the high-priority task can be guaranteed; the disadvantage is that there are many context switches. (3) Non-preemptive scheduling: Usually scheduled by time slice, the task is not allowed to be interrupted during execution. Once the task occupies the processor, it must be executed or voluntarily given up, such as WinCE. The advantage is that the context switching is less; the disadvantage is that the processor has low effective resource utilization and poor schedulability. (4) Static table driving strategy: Before the system runs, according to the time constraints and associations of each task, a certain search strategy is used to generate a running time table, indicating the starting running time and running time of each task. (5) Priority driving strategy: Determine the execution order of tasks according to the priority of the task. (6) Real-time task classification: periodic tasks, incidental tasks, and non-periodic tasks. (7) General structure model of real-time system: data collection task realizes sensor data collection, data processing task processes the collected data, and sends the processed data to the execution organization management task control organization for execution.

5, embedded microprocessor architecture

(1) von Neumann structure: program and data share a storage space, program instruction storage address and data storage address point to different physical locations of the same memory, using a single address and data bus, the program and data have the same width. For example: 8086, ARM7, MIPS...

(2) Harvard structure: Program and data are two independent memories. Each memory is independently addressed and accessed independently. It is a memory structure that separates program storage from data storage. For example: AVR, ARM9, ARM10... (3) Comparison of CISC and RISC features. The time P required by the computer to execute the program can be calculated by the following formula: P = I × CPI × T I: The number of instructions that are run on the machine after the high-level language program is compiled. CPI: The average number of cycles required to execute each instruction. T: The time of each machine cycle. (4) The idea of ​​the pipeline: Sub-processes in which the serial execution of an instruction is changed into several instructions in the CPU are executed in the CPU. (5) Index of the pipeline: throughput rate: the number of results of the pipeline processor in unit time. If the sub-process of the pipeline takes a different amount of time, the throughput rate should be the reciprocal of the longest sub-process. Settling time: The time at which the pipeline starts working to reach the maximum throughput rate. If the time used by m sub-processes is the same, both are t, then the time T=mt is established. (6) Byte order of information storage A, memory unit: byte (8 bits) B. The word length determines the addressing capability of the microprocessor, that is, the size of the virtual address space. C, 32-bit microprocessor virtual address space bit 232, which is 4GB. D, little endian byte order: the low byte is at the low address of the memory, and the high byte is at the high address of the memory. E, big endian byte order: the high byte is at the low address of the memory, and the low byte is at the high address of the memory. F. The storage order of network devices depends on the data link layer in the bottom layer of the OSI model.

6, the logic circuit foundation

(1) According to whether the circuit has a storage function, the logic circuit is divided into: a combinational logic circuit and a sequential logic circuit.

(2) Combinational logic circuit: The output of the circuit at any time depends only on the input signal at that moment, regardless of the state of the circuit before the input signal is applied. Commonly used logic circuits include decoders and multiplexers. (3) Sequential logic circuit: The output of the circuit at any time is not only related to the input at that moment, but also related to the state of the circuit at that moment. Therefore, memory elements must be included in the sequential circuit. Triggers are the basis for constructing sequential logic circuits. Commonly used sequential logic circuits include registers and counters. (4) The concept of truth table, Boolean algebra, Morgan's law, and gate circuit. (5) NOR (or non-) and NAND (NAND) gates are called full-featured gates and can implement any kind of logic function. (6) Decoder: A combined logic network with multiple inputs and multiple outputs. Each time an n-bit binary code is entered, at most one of the m outputs is valid. When m=2n is, it is fully decoded; when m is 2n, it is partially decoded. (7) Since the high-level output current of the integrated circuit is small, and the low-level output current is relatively large, when the integrated gate circuit directly drives the LED, the low-level driving mode is often used. The liquid crystal seven-segment display LCD utilizes different optical characteristics of the liquid crystal with an applied electric field and no external electric field to display characters. (8) The clock signal is the basis of the timing logic and is used to determine the appropriate update of the state in the logic unit. Synchronization is the main constraint in clock control systems. (9) When selecting a trigger, the trigger mode is a factor that must be considered. There are two trigger modes: Mode 1: Level trigger mode: It has a simple structure and is often used to form a scratchpad.

Mode 2: Edge trigger mode: It has strong anti-data interference capability and is commonly used to form registers, counters, etc.

7, bus circuit and signal drive

(1) The bus is a collection of various signal lines and is a common path for transferring data, addresses, and control information between components in an embedded system. At the same time, one binary signal can be transmitted on each path. According to the type of information transmitted by the bus, it can be divided into: data bus (DB), address bus (AB) and control bus (CB).

(2) Main parameters of the bus: Bus bandwidth: The amount of data that can be transmitted on the bus within a certain period of time, generally expressed in MByte/s. Bus width: The number of bits of data that the bus can transmit at the same time, that is, the concept of bus widths such as 32-bit and 64-bit, which is often referred to as bus width. The wider the bit width of the bus, the larger the data transfer rate per second of the bus, that is, the wider the bus bandwidth. Bus frequency: The working clock frequency is in MHz. The higher the operating frequency, the faster the bus operates, that is, the wider the bus bandwidth. Bus bandwidth = bus bit width x bus frequency / 8, in MBps. Common bus: ISA bus, PCI bus, IIC bus, SPI bus, PC104 bus and CAN bus. (3) Only devices with three-state outputs can be connected to the data bus. The commonly used tri-state gates are output buffers. (4) When the load connected to the bus exceeds the load capacity of the bus, a buffer or driver must be added between the bus and the load. The most commonly used is a tristate buffer, which functions to drive and isolate. (5) The bus bus multiplexing technology can realize the sharing of the data bus and the address bus. But it will bring two problems: A. It is necessary to add an external circuit to multiplex and decouple the bus signal, for example: address latch. B. The bus speed is lower than that of the non-multiplexed bus system. (6) Two types of bus communication protocols: synchronous mode and asynchronous mode. (7) The solution to the bus arbitration problem is based on the concept of priority (priority).

8, level conversion circuit

(1) Digital integrated circuits can be divided into two categories: bipolar integrated circuits (TTL) and metal oxide semiconductors (MOS).

(2) CMOS circuits are widely used due to their extremely low static power consumption, high operating speed and strong anti-interference ability.

(3) The solution to the TTL and CMOS circuit interface is to connect a pull-up resistor R between the output of the TTL circuit and the power supply. The value of the pull-up resistor R is determined by the high-level output leakage current IOH of the TTL. The TTL should use a different R value.

9, information representation and computing basis in embedded systems

(1) Carry count system and conversion: This is relatively simple, and you should also know how to convert, and there is a possibility of a problem. (2) Representation of numbers in computers: source code, inverse code and complement code. The inverse of the positive number is the same as the source code. The inverse of the negative number is the source code of the number except the sign bit. The complement of a positive number is the same as the source code, and the complement of a negative number is one plus the inverse of the number. For example, the source code B of -98 is B-complement B (3) fixed-point notation: the position of the decimal point of the number is fixed by the artificial agreement. Floating point notation: The decimal point position of a number is floating, which consists of a mantissa part and an order part. Any binary N can always be written as: N=2P×S. S is the mantissa and P is the order. (4) Chinese character representation, to understand the transformation of GB2318-80 Chinese code and internal code. (5) Waveform quantization parameters in speech coding (may be a simple calculation problem) Sampling frequency: The number of samples in one second, reflecting the interval between sampling points. The upper limit of the human ear is 20 kHz, so the sampling frequency above 40 kHz is enough to satisfy. The sampling frequency used for CD recording is 44.1 kHz. Measurement accuracy: The quantization level of the sample. Currently, the standard sampling level has 8 bits and 16 bits. Number of channels: mono and stereo dual channels. Stereo requires twice the storage space.

10, error control coding

(1) According to the function of the code group, it can be divided into two types: error detection code and error correction code. The error detection code refers to a code that can automatically detect an error, such as a parity check code; an error correction code refers to a code that can not only detect an error but also automatically correct an error, such as a cyclic redundancy check code. (2) Parity check code, Hamming code, cyclic redundancy check code (CRC).

11. Error control coding metrics for embedded systems

(1) Performance indicators: divided into component performance indicators and comprehensive performance indicators, including: throughput, real-time and various utilization. (2) Reliability and safety Reliability is the most important and outstanding basic requirement of embedded systems. It is a guarantee that an embedded system can work normally. It is generally measured by the mean time between failures (MTBF).

(3) Maintainability: Generally expressed by the average repair time MTTR.

(4) Availability

(5) Power consumption

(6) Environmental adaptability (7) Universality (8) Security (9) Confidentiality (10) Scalability The price in the price/performance ratio, in addition to the price of the direct purchase of the embedded system, should also include installation costs, several years. Operating maintenance costs and software rental fees.

Evaluation methods for embedded systems: measurement methods and model methods

(1) Measurement is the most direct and basic method, and two problems need to be solved:

A. Determine the system parameters to be measured according to the purpose of the study.

B. Choose the tools and methods of measurement.

(2) There are two ways to measure: sampling mode and event tracking mode.

(3) The model method is divided into an analysis model method and a simulation model method. The analytical model method uses some mathematical equations to describe the model of the system. The simulation model method uses the operation of the simulation program to dynamically express the state of the embedded system, and performs systematic statistical analysis to obtain performance indicators.

(4) The most used in the analytical model method is the queuing model, which consists of three parts: input stream, queuing rules, and service organization.

(5) Using the model to evaluate the system requires solving three problems: designing the model, solving the model, and calibrating and validating the model.

12, interface technology

1, Flash memory

(1) Flash memory is a kind of non-volatile memory, which can be divided into NOR Flash and NAND Flash according to different structures.

(2) Features of Flash memory:

A. Block structure: It is physically divided into several blocks, and the blocks are independent of each other.

B. First erase and write: Flash write operation can only write data bits from 1 to 0, and cannot write from 0 to 1, so you must perform an erase operation before initializing the memory to initialize the pre-written data bits. Is 1. The smallest unit of erase operation is a block, not a single byte.

C. Operation instruction: To perform a write operation, it must input a string of special instructions (NOR Flash) or complete a timing (NAND Flash) to write data.

D. Bit reversal: Due to the inherent characteristics of Flash, one or more data errors are occasionally generated during the reading and writing process. Bit reversal cannot be avoided, and the results can only be processed afterwards by other means.

E. Bad block: Once the block is damaged, it will not be repaired. The result of a corrupted block operation is unpredictable.

(3) Features of NOR Flash:

The application can run directly in flash without having to read the code into system RAM. NOR Flash has a very high transmission efficiency and is very cost effective in the small capacity of 1MB~4MB, but the low write and erase speed greatly affects its performance.

(4) Features of NAND Flash

The ability to increase extremely high density cells allows for high storage densities and fast write and erase speeds, which is why all U-disks use NAND Flash as the storage medium. The difficulty with applying NAND Flash is that flash requires a special system interface.

(5) The difference between NOR Flash and NAND Flash:

A, NOR Flash read speed is slightly faster than NAND Flash.

B, NAND Flash erase and write speed is much faster than NOR Flash

C, NAND Flash has a poor random reading capability and is suitable for continuous reading of large amounts of data.

D, NOR Flash with SRAM interface, with enough address introduction to address, you can easily access every byte inside it. NAND Flash's address, data, and commands share an 8-bit bus (16-bit products are written by the company), and each time it is read or written, it uses a complex I/O interface to serially access data.

E, NOR Flash capacity is generally small, usually between 1MB ~ 8MB; NAND Flash is only used in products above 8MB. Therefore, NOR Flash is only suitable for data storage as long as it is applied to code storage media.

F, the maximum number of erasures per block in NAND Flash is one million, and NOR Flash is 100,000 times.

G, NOR Flash can be connected like other memory, very directly used, and can run code directly on it; NAND Flash requires special I/O interface, you must write the driver before you can continue to execute other operating. Because designers can never write to bad blocks, this means that virtual images must be made on NAND Flash from start to finish.

H, NOR Flash is used for code storage, communication products, network processing and other fields that require high data reliability, and is used as code flash memory; NAND Flash is used for MP3, memory card, U disk, etc. with high storage capacity requirements. The domain is becoming a data flash.

2, RAM memory

(1) Features of SRAM:

SRAM stands for Static Random Access Memory. It maintains a value as long as it is powered. It has no refresh cycle. The flip-flop constitutes a basic unit with low integration. Each SRAM memory cell consists of 6 transistors, so its cost is high. It has a higher rate and is commonly used in cache memories. Usually SRAM has 4 types of pins:

CE: Chip select signal, active low.

R/W: Read and write control signals.

ADDRESS: A set of address lines.

DATA: A set of bidirectional signal lines for data transmission.

(2) Features of DRAM:

DRAM stands for Dynamic Random Access Memory. This is a semiconductor memory that is stored in the form of a charge. Each of its memory cells consists of a transistor and a capacitor, and the data is stored in a capacitor. Capacitors can lose charge due to leakage, and DRAM devices are unstable. It must be refreshed regularly to store the data in memory.

The interface of DRAM is more complicated, usually with the following pins:

CE: Chip select signal, active low.

R/W: Read and write control signals.

RAS: Row address strobe signal, usually connected to the upper part of the address.

CAS: Column address strobe signal, usually connected to the lower part of the address.

ADDRESS: A set of address lines.

DATA: A set of bidirectional signal lines for data transmission.

(3) Features of SDRAM:

SDRAM stands for Synchronous Dynamic Random Access Memory. Synchronization means that the memory work requires a synchronous clock. The internal command transmission and data transmission are based on it. Dynamic means that the memory array needs constant refresh to ensure data is not lost. It usually only works at 133MHz.

(4) Features of DDRAM

DDRAM stands for Double Rate Synchronous Dynamic Random Access Memory (DDR), also known as DDR. DDRAM is based on SDRAM technology. SDRAM transmits data only once in one clock cycle. It transmits data during the rising period of the clock. DDR memory transfers data twice in one clock cycle. It can rise in the clock. Data is transmitted once for each period and period. At 133MHz, the DDR memory bandwidth can reach 133×64b/8×2=2.1GB/s.

3, hard disk, CD, CF card, SD card

4, GPIO principle and structure

GPIO is the most basic form of I/O, it is a set of input or output pins. Some GPIO pins can be programmed to change the direction of operation. There are usually two control registers: the data register and the data direction register. The data direction register sets the direction of the port. If the pin is set to an output, the data register will control the state of that pin. If the pin is set as an input, the state of this input pin is controlled by the logic circuit layer on the pin.

5, A / D interface

(1) The A/D converter is a circuit that converts an electrical analog quantity into a digital quantity. There are many ways to implement A/D conversion. The commonly used methods are counting method, double integral method and successive pushing method.

(2) Counting A/D conversion method

The main components of the circuit include: comparators, counters, D/A converters and standard voltage sources.

The working principle is simply that there is a counter that increments from 0 and increments by one. Each time it is incremented by 1, the value is used as the input of the D/A converter, which produces a comparison voltage VO compared with the input analog voltage VIN. . If VO is less than VIN, continue to increment by 1 until VO is greater than VIN. At this time, the accumulated value of the counter is the output value of the A/D converter.

This conversion method is characterized by simplicity, but at a slower speed, especially when the analog voltage is higher, the conversion speed is slower. For example, for an 8-bit A/D converter, if the input analog value is the maximum value, the counter should count from 0 to 255, and do 255 D/A conversion and voltage comparison to complete the conversion.

(3) Double integral A/D conversion method

The main components of the circuit include: an integrator, a comparator, a counter, and a standard voltage source.

The working principle is that, firstly, the circuit integrates the input voltage to be measured for a fixed time, and then converts to the standard voltage to perform the reverse integration of the fixed slope, and the reverse integration proceeds to a certain time, and then returns to the starting value. Due to the fixed slope, the time to reverse integration of the standard voltage is proportional to the input analog voltage value. The larger the input analog voltage, the longer the reverse integration back to the start value. As long as the time taken for the reverse integration is measured by a standard high-frequency clock pulse, the digital quantity corresponding to the input analog voltage can be obtained, and the A/D conversion is completed.

Its characteristic is that it has strong resistance to power frequency interference, high conversion precision, but slow conversion speed, usually the conversion frequency is less than 10Hz, mainly used for digital test instruments, temperature measurement and so on.

(4) Successive approximation A/D conversion method

The main components of the circuit include: a comparator, a D/A converter, a successive approximation register, and a reference voltage source.

The working principle is that it is essentially the binary search method, and the principle of peacetime balance is the same. In the A/D conversion, the D/A converter increases the number of conversion bits bit by bit from high to low, generates different output voltages, and compares the input voltage with the output voltage. First, the highest bit is set to 1, which is equivalent to 1/2 of the reference voltage to be compared with the input voltage. If the input voltage is less than 1/2 of the reference voltage, the highest position is 0, otherwise it is set to 1. After that, the second highest position is 1, which is equivalent to a binary search in the range of 1/2, and so on, successive approximation.

Its characteristics are fast speed and high conversion precision. It only needs M clock pulses for the N-bit A/D converter. It can be used to measure the transition process from tens to hundreds of microseconds. A common method of conversion.

(5) Important indicators of A/D conversion (possibly taking some simple calculations)

A. Resolution: Reflects the ability of the A/D converter to respond to small changes in input, usually expressed as the level of the analog voltage corresponding to the lowest bit of the digital output (LSB). The n-bit A/D converter can reflect the analog input level of 1/2n full scale.

B. Range: The range of analog input voltages that can be converted is divided into unipolar and bipolar types.

C. Conversion time: The time required to complete an A/D conversion, and the reciprocal is the conversion rate.

D. Accuracy: Accuracy and resolution are two different concepts. Even if the resolution is high, the accuracy may not be high enough due to temperature drift, linearity, and the like. Accuracy has two representations of absolute precision and relative precision. The absolute accuracy is usually expressed in terms of the fractional value of the least significant bit LSB of the digital quantity, and the relative accuracy is expressed by the percentage of its analog voltage full scale.

For example, a full-scale 10V, 10-bit A/D chip, if its absolute accuracy is ±1/2LSB, the quantization unit of its least significant bit LSB is: 10/1024=9.77mv, and its absolute accuracy is 9.77mv/2= 4.88mv, the relative accuracy is: 0.048%.

6, D / A interface basic

(1) The D/A converter converts the digital quantity into an analog quantity.

(2) In an integrated circuit, a T-type network is usually used to convert a digital quantity into an analog current, and an operational amplifier converts the analog circuit into an analog voltage. Performing D/A conversion actually requires the above two links.

(3) Classification of D/A converters:

A, voltage output type: often used as a high-speed D / A converter.

B, current output type: generally used in external operational amplifiers.

C. Multiplication type: can be used as a modulator and digitally attenuate the input signal.

(4) Main indicators of D/A converter: resolution, setup time, linearity, conversion accuracy, temperature coefficient.

7, keyboard interface

(1) Two forms of keyboard: linear keyboard and matrix keyboard.

(2) There are usually two methods for identifying the close button on the keyboard: line scan and line inversion.

(3) Line scanning method is a commonly used identification method for matrix keyboard keys. This method is divided into two steps:

A. Identify which column of the keyboard is pressed: Make all the line lines low, and check if the line level of each column is low. If there is a column line low, it means that the button is pressed, otherwise Description No button press.

B. If a column has a button press, identify which row of the keyboard is pressed: set the low level line by line, and set the remaining behaviors to be high level, query the changes of each column, if the column level becomes low level, You can then confirm that the button at the intersection of this column is pressed.

8, display interface

(1) The basic principle of LCD is to control the passage of light by powering different liquid crystal cells to achieve the purpose of display.

(2) There are two ways to provide light source for LCD: projection type and reflection type. The LCD display of the notebook computer is a projection type, and there is a light source behind the screen, so the external environment can eliminate the need for a light source. Generally, the LCD used on the microcontroller is reflective, requiring external power supply and working by reflected light. Electroluminescence (EL) is one way in which a liquid crystal panel provides a light source.

(3) According to the classification of liquid crystal driving methods, common LCDs can be classified into three types: twisted nematic (TN), super twisted nematic (STN), and thin film transistor (TFT).

(4) There are two types of LCDs available on the market: LCD display modules with drive circuits, as long as the bus mode is driven; LCD displays without drive circuits, using the controller scan mode.

(5) Generally, when the LCD controller is working, the data of the specified address (display buffer) in the SDRAM is directly read by the SDRAM controller through the DMA request bus, and the data is converted into the LCD scan data format by the LCD controller. Directly drive the LCD display.

(6) The VGA interface is essentially an analog interface, generally adopting a unified 15-pin interface, including 2 NC signals, 3 display data buses, 5 GND signals, 3 RGB color components, and 1 line sync signal. And 1 field sync signal. The level standard used for its color component is the RS343 standard defined by EIA.

9, touch screen interface

(1) According to the working principle, the touch screen can be divided into: surface acoustic wave screen, capacitive screen, resistive screen and infrared screen.

(2) The touch screen is controlled by a professional chip such as the ADS7843.

10, audio interface

(1) Basic principle: The data input by the microphone is decoded by the audio codec to complete the A/D conversion. The decoded audio data is sent to the DSP or CPU through the audio controller for corresponding processing, and then the data is sent to the audio through the audio controller. The encoder is output by the speaker after encoding D/A conversion.

(2) There are many formats for digital audio. The most common ones are the following:

A. Using digital audio (PCM): It is the data format used by CD or DVD. The sampling frequency is 44.1 kHz. With a precision of 16 bits, the PCM audio data rate is 1.41 Mb/s; when the accuracy is 32 bits, it is 2.42 Mb/s. A 700MB CD can hold about 60 minutes of music in 16-bit PCM data format.

B, MPEG layer 3 audio (MP3): The audio format used by the MP3 player. Stereo MP3 data rates range from 112 kb/s to 128 kb/s.

C, ATSC Digital Audio Compression Standard (AC3): Digital TV, HDTV and film digital audio coding standards, stereo AC3 encoded data rate is 192kb / s.

(3) IIS is a commonly used serial audio digital interface for encoding or decoding audio data. The IIS bus only processes sound data, and other control signals need to be transmitted separately. IIS uses three serial buses: data line SD, field select line WS, and clock signal line SCK.

(4) When the data field widths of the receiver and the sender are different, the sender does not consider the data field width of the receiver. If the data field sent by the sender is smaller than the system field width, the low bit is padded with 0; if the sender's data width is greater than the receiver's width, the portion exceeding the LSB is truncated. The field selection WS is used to select the left and right channels, the WS = 0 indicates that the left channel is selected, and the WS = 1 indicates that the right channel is selected. In addition, WS allows the receiving device to store the previous byte and is ready to receive the next byte.

11, serial interface

(1) Serial communication refers to communication realized by transmitting data one bit at a time. Compared with parallel communication, serial communication has the advantages of less transmission line and low cost, and is especially suitable for long-distance transmission; the disadvantage is that the speed is slow.

(2) There are three basic communication modes for serial data transmission: simplex, half-duplex, and full-duplex.

(3) Serial communication can be divided into two modes in information format: synchronous communication and asynchronous communication.

A. Asynchronous Transfer: Each character is transmitted as independent information and transmitted at a fixed and predetermined timing, but depending on the arbitrary timing of characters and characters between characters. In asynchronous communication, characters are transmitted one frame at a time, and the transmission of characters per frame is synchronized by the start bit. The interval between codes of one frame of data is fixed, and the interval between adjacent frames of data is not fixed.

B. Synchronous transmission: The synchronization mode is not only synchronous between characters, but also the timing between characters and characters is still synchronized, that is, the synchronization method is to convert many characters into one character block after each Before the block information, 1 or 2 sync characters are added, and the appropriate error detection data is added after the character block is transmitted.

(4) Asynchronous communication must follow three rules:

A, character format: start bit + data + check digit + stop bit (test bit can be no), the low bit is transmitted first.

B. Baud rate: The number of bits transmitted per second.

C, check digit: parity test.

a, odd parity: to make the character plus check digits have an odd number of "1".

b. Even test: To make the character plus the check digit have an even number of "1".

(5) Electrical characteristics of RS-232C: negative logic.

A. On TxD and RxD: Logic 1 is -3V to -15V, and logic 0 is 3V to 15V.

B. On the control lines such as TES, CTS, DTR, DCD, etc.:

The signal is valid (ON state) is 3V to 15V. The signal is invalid (OFF state) is -3V to -15V.

(6) The level conversion between the TTL standard and the RS-232C standard is realized by the integrated chip RS232.

(7) RS-422 serial communication interface

A. RS-422 is a one-way, balanced transmission specification for single-machine transmission and multi-machine reception. The transmission rate can reach 10Mb/s.

B, RS-422 uses differential transmission, also known as balanced transmission, using a pair of twisted pairs.

C, RS-422 requires a terminating resistor, and its resistance is required to be equal to the characteristic impedance of the transmission cable.

(8) RS-485 serial bus interface

A. RS-485 is a standard established on the basis of RS-422, which increases the multi-point and two-way communication capability, and the communication distance can be several tens of meters to several kilometers.

B, RS-485 transceiver uses balanced transmission and differential reception, with the ability to suppress common mode interference.

C, RS-485 requires two terminating resistors. Terminal resistance is not required for transmission at close range (300m).

12, parallel interface

(1) The data transmission rate of the parallel interface is 8 times faster than that of the serial interface. The data transmission rate of the standard parallel interface is 1 Mb/s, which is generally used to connect printers, scanners, etc., so it is also called the print port.

(2) The parallel interface can be divided into SPP (standard parallel port), EPP (enhanced parallel port) and ECP (extended parallel port).

(3) Parallel buses are divided into standard and non-standard categories. Commonly used parallel standard buses are the IEEE 488 bus and the ANSI SCSI bus. The MXI bus is a high performance non-standard universal multi-user parallel bus.

13, PCI interface

(1) The PCI bus is a high-performance 32-bit and 64-bit bus for address and data multiplexing, and is an interconnection mechanism between the microprocessor and peripheral control components and peripheral add-on boards.

(2) From the data width, PCI defines a 32-bit data bus and can be extended to 64 bits. From the bus speed, there are two kinds of 33MHz and 66MHz.

(3) Compared with the ISA bus, the address bus of the PCI bus is time-multiplexed with the data bus, and supports functions such as plug and play and interrupt sharing.

14, USB interface

(1) Main features of the USB bus:

A, easy to use, plug and play.

B. There is a host in each USB system. Up to 127 devices can be connected to this USB network.

C、应用范围广，支持多个设备同时操作。

D、低成本的电缆和连接器，使用统一的4引脚插头。

E、较强的纠错能力。

F、较低的协议开销带来了高的总线性能，且适合于低成本外设的开发。

G、支持主机与设备之间的多数据流和多消息流传输，且支持同步和异步传输类型。

H、总线供电，能为设备提供5V/100mA的供电。

（2）USB系统由3部分来描述：USB主机、USB设备和USB互连。

（3）USB总线支持的数据传输率有3种：高速信令位传输率为480Mb/s;全速信令位传输率为12Mb/s;全速信令位传输率为1.5Mb/s。

（4）USB总线电缆有4根线：一对双绞信号线和一对电源线。

（5）USB是一种查询总线，由主控制器启动所有的数据传输。USB上所挂接的外设通过由主机调度的、基于令牌的协议来共享USB带宽。

（6）大部分总线事务涉及3个包的传输：

A、令牌包：指示总线上要执行什么事务，欲寻址的USB设备及数据传送方向。

B、数据包：传输数据或指示它没有数据要传输。

C、握手包：指示传输是否成功。

（7）主机与设备端点之间的USB数据传输模型被称作管道。管道有两种类型：流和消息。消息数据具有USB定义的结构，而数据流没有。

（8）事务调度表允许对某些流管道进行流量控制，在硬件级，通过使用NAK（否认）握手信号来调节数据传输率，以防止缓冲区上溢或下溢产生。

（9）USB设备最大的特点是即插即用。

（10）工作原理：USB设备插入USB端点时，主机都通过默认地址0与设备的端点0进行通信。在这个过程中，主机发出一系列试图得到描述符的标准请求，通过这些请求，主机得到所有感兴趣的设备信息，从而知道了设备的情况以及该如何与设备通信。随后主机通过发出Set Address请求为设备设置一个唯一的地址。以后主机就通过为设备设置好的地址与设备通信，而不再使用默认地址0。

15、SPI接口

（1）SPI是一个同步协议接口，所有的传输都参照一个共同的时钟，这个同步时钟有主机产生，接收数据的外设使用时钟来对串行比特流的接收进行同步化。

（2）在多个设备连接到主机的同一个SPI接口时，主机通过从设备的片选引脚来选择。

（3）SPI主要使用4个信号：主机输出/从机输入（MOSI），主机输入/从机输出（MISO）、串行时钟SCLK和外设片选CS。

（4）主机和外设都包含一个串行移位寄存器，主机通过向它的SPI串行寄存器写入一个字节来发起一次数据传输。寄存器通过MOSI信号线将字节传送给外设，外设也将自己移位寄存器中的内容通过MISO信号线返回给主机，这样，两个移位寄存器中的内容就被交换了。

（5）外设的写操作和读操作时同步完成的，因此SPI成为一个很有效的协议。

（6）如果只是进行写操作，主机只需忽略收到的字节;反过来，如果主机要读取外设的一个字节，就必须发送一个空字节来引发从机的传输。

16、IIC接口

（1）IIC总线是具备总线仲裁和高低速设备同步等功能的高性能多主机总线。

（2）IIC总线上需要两条线：串行数据线SDA和串行时钟线SCL。

（3）总线上的每个器件都有唯一的地址以供识别，而且各器件都可以作为一个发送器或者接收器（由器件的功能决定）。

（4）IIC总线有4种操作模式：主发送、主接收、从发送、从接收。

（5）IIC在传送数据过程******有3种类型信号：

A、开始信号：SCL为低电平时，SDA由高向低跳变。

B、结束信号：SCL为低电平时，SDA由低向高跳变。

C、应答信号：接收方在收到8位数据后，在第9个脉冲向发送方发出特点的低电平。

（6）主器件发送一个开始信号后，它还会立即送出一个从地址，来通知将与它进行数据通信的从器件。1个字节的地址包括7位地址信息和1位传输方向指示位，如果第7位为0，表示要进行一个写操作，如果为1，表示要进行一个读操作。

（7）SDA线上传输的每个字节长度都是8位，每次传输种字节的数量没有限制的。在开始信号后面的第一个字节是地址域，之后每个传输字节后面都有一个应答位（ACK），传输中串行数据的MSB（字节高位）首先发送。

（8）如果数据接收方无法再接收更多的数据，它可以通过将SCL保持低电平来中断传输，这样可以迫使数据发送方等待，直到SCL被重新释放。这样可以达到高低速设备同步。

（9）IIC总线的工作过程：SDA和SCL都是双向的。空闲的时候，SDA和SCL都是高电平，只有SDA变为低电平，接着SCL再变为低电平，IIC总线的数据传输才开始。SDA线上被传输的每一位在SCL的上升沿被采样，该位必须一直保持有效到SCL再次变为低电平，然后SDA就在SCL再次变为高电平之前传输下一个位。最后，SCL变回高电平，接着SDA也变为高电平，表示数据传输结束。

17、以太网接口

（1）最常用的以太网协议是IEEE802.3标准。

（2）传输编码（06和07年都有******）：曼彻斯特编码和差分曼彻斯特编码。

A、曼彻斯特编码：每位中间有一个电平跳变，从高到底的跳变表示“0”，从低到高的跳变表示为“1”。

B、差分曼彻斯特编码：每位中间有一个电平跳变，利用每个码元开始时有无跳变来表示“0”或“1”，有跳变为“0”，无跳变为“1”。

（3）相比之下，曼彻斯特编码编码简单，差分曼彻斯特编码提供更好的噪声抑制性能。

（4）以太网数据传输特点：

A、所有数据位的传输由低位开始，传输的位流时用曼彻斯特编码。

B、以太网是基于冲突检测的总线复用方法，由硬件自动执行。

C、传输的数据长度，目的地址DA+源地址SA+类型字段TYPE+数据段DATA+填充位PAD，最小为60B，最大为1514B。

D、通常以太网卡可以接收3种地址的数据：广播地址、多播地址、自己的地址。

E、任何两个网卡的物理地址都不一样，是世界上唯一的，网卡地址由专门机构分配。

（5）嵌入式以太网接口有两种实现方法：

A、嵌入式处理器+网卡芯片（例如：RTL8019AS、CS8900等）B、带有以太网接口的处理器。

（6）TCP/IP是一个分层协议，分为：物理层、数据链路层、网络层、传输层和应用层。每层实现一个明确的功能，对应一个或几个传输协议，每层相对于它的下层都作为一个独立的数据包来实现。每层上的协议如下：

A、应用层：BSD套接字。

B、传输层：TCP、UDP。

C、网络层：IP、ARP、ICMP、IGMPD、数据链路层：IEEE802.3 Ethernet MACE、物理层：二进制比特流。

（7）ARP（地址解析协议）

A、网络层用32位的地址来标识不同的主机（即IP地址），而链路层使用48位的物理地址（MAC）来标识不同的以太网或令牌网接口。

B、ARP功能：实现从IP地址到对应物理地址的转换。

（8）ICMP（网络控制报文协议）

A、IP层用它来与其他主机或路由器交换错误报文和其他重要控制信息。

B、ICMP报文是在IP数据包内被传输的。

C、网络诊断工具ping和traceroute其实就是ICMP协议。

（9）IP（网际协议）

A、IP工作在网络层，是TCP/IP协议族中最为核心的协议。

B、所有的TCP、UDP、ICMP及IGMP数据都以IP数据包格式传输。

C、TTL（生存时间字段）：指定了IP数据包的生存时间（数据包可以经过的路由器数）。

D、IP提供不可靠、无连接的数据包传送服务，高效、灵活。

a、不可靠：它不能保证数据包能成功到达目的地，任何要求的可靠性必须由上层来提供（如TCP）。如果发生某种错误，IP有一个简单的错误处理算法--丢弃该数据包，然后发送ICMP消息报给信源端。

b、无连接：IP不维护任何关于后续数据包的状态信息。每个数据包的处理都是相互独立的。IP数据包可以不按顺序接收，

（10）TCP（传输控制协议）TCP协议是一个面向连接的可靠的传输层协议，它为两台主机提供高可靠性的端到端数据通信。

（11）UDP（用户数据包协议）UDP协议是一种无连接不可靠的传输层协议，它不保证数据包能到达目的地，可靠性有应用层来提供。UDP协议开销少，和TCP相比更适合于应用在低端的嵌入式领域中。

（12）端口：TCP和UDP采用16位端口号来识别上层的用户，即应用层协议，例如FTP服务的TCP端口号都是21，Telnet服务的TCP端口号都是23，TFTP服务的UDP端口号都是69。

18、CAN总线接口

（1）CAN（Control Area Network，控制器局域网）总线是一种多主方式的串行通信总线，是国际上应用最广泛的现场总线之一，最初被用于汽车环境中的电子控制网络。一个CAN总线构成的单一网络中，理想情况下可以挂接任意多个节点，实际应用中节点数据受网络硬件的电气特性所限制。

（2）总线信号使用差分电压传送。两条信号线被称为CAN_H和CAN_L，静态是均为2.5V左右，此时状态表示逻辑1，也可以叫做“隐性”。用CAN_H比CAN_L高表示逻辑0，称为“显性”，此时，通常电压值为CAN_H=3.5V和CAN_L=1.5V。

（3）当“显性”和“隐性”位同时发送的时候，最后总线数值将为“显性”这种特性为CAN总线的仲裁奠定了基础。

（4）CAN总线的一个位时间可以分成4个部分：同步段、传播时间段、相位缓冲段1和相位缓冲段2。

（5）CAN总线的数据帧有两种格式：标准格式和扩展格式。包括：帧起始、仲裁场、控制场、数据场、CRC场、ACK场和帧结束。

（6）CAN总线硬件接口包括：CAN总线控制器和CAN收发器。CAN控制器主要完成时序逻辑转换等工作，例如菲利普的SJA1000。CAN收发器是CAN总线的物理层芯片，实现TTL电平到CAN总线电平特性的转换，例如TJA1050。

19、xDSL接口

（1）xDSL（数字用户线路）技术是，在现有用户电话线两侧同时接入专用的DSL调制解调设备，在用户线上利用数字数字信号高频带宽较宽的特性直接采用数字信号传输，省去中间的A/D转换，突破了模拟信号传输极限速率为56KB/s的闲置。

（2）DSL技术主要分为对称和非对称两大类。

（3）对成xDSL更适合于企业点对点连接应用，例如文件传输、视频会议等收发数据量大致相同的工作。

（4）ASDL是近年发展的另一种宽带接入技术，是利用双绞铜线向用户提供两个方向上速率不对称的宽带信息业务。

（5）ADSL在一对电话线上同时传送一路高速下行数据、一路较低速率上行数据、一路模拟电话。各信号之间采用频分复用方式占用不同频带，低频段传送话音;中间窄频带传送上行信道数据及控制信息;其余高频段传送下行信道数据、图像或高速数据。

20、WLAN接口

（1）WLAN（Wireless Local Area Network）是利用无线通信技术在一定的局部范围内建立的，是计算机网络与无线通信技术相结合的产物，它以无线多址通道作为传输媒介，提供有线局域网的功能。

（2）WLAN的标准：主要是针对物理层和媒质访问控制层（MAC层），涉及到所有使用的无线频率范围、控制接口通信协议等技术规范与技术标准。

A、IEEE 802.11：定义了物理层和MAC层规范，工作在2.4～2.4835GHz频段，最高速率为2Mb/s，是IEEE最初制定的一个无线局域网标准。

B、IEEE 802.11b：工作在2.4～2.4835GHz频段，最高速率为11Mb/s，传输距离50～150inch。采用点对点模式和基本模式两种运行模式。在数据传输速率方面可以根据实际情况在11Mb/s、5.5Mb/s、2 Mb/s、1 Mb/s的不同速率间自动切换。

C、IEEE 802.11a：工作在5.15～8.825GHz频段，最高速率为54Mb/s/72Mb/s，传输距离10～100m。

D、IEEE 802.11g：混合标准，拥有EEE 802.11a的传输速率，安全性较EEE 802.11b好，采用两种调制方式，做到与EEE 802.11a和EEE 802.11b兼容。

（3）WLAN有两种网络类型：对等网络和基础机构网络。

21、蓝牙接口

（1）蓝牙技术的目的：使特定的移动电话、便鞋式电脑以及各种便携通信设备的主机之间近距离内实现无缝的资源共享。

（2）蓝牙技术的实质内容是要建立通用的无线空中接口及其控制软件的公开标准。其工作频段为全球通用的2.4GHz ISM（即工业、科学、医学）频段，其数据传输速率为1Mb/s，采用时分双工方案来实现全双工传输，其理想的连接范围为10cm～10m。

（3）蓝牙基带协议是电路交换和分组交换的结合。

（4）蓝牙技术特点：

A、传输距离短，工作距离在10m以内。

B、采用跳频扩频技术。

C、采用时分复用多路访问技术，有效地避免了“碰撞”和“隐藏终端”等问题。

D、网络技术。

E、语言支持。

F、纠错技术，其采用的是FEC（前向纠错）方案。

（5）蓝牙接口由3大单元组成：无线单元、基带单元、链路管理与控制单元。 2

2、1394接口

（1）1394作为一种标准总线，可以在不同的工业设备之间架起一座沟通的桥梁，在一条总线上可以接入63个设备。

（2）IEEE 1394的特点：

A、支持多种总线速度，适应不同应用要求。

B、即插即用，支持热插拔。

C、支持同步和异步两种传输方式。

D、支持点到点通信模式，IEEE 1394是多主总线。

E、遵循ANSI IEEE 1212控制及状态寄存器（CSR）标准，定义了64位的地址空间，可寻址1024条总线的63个节点，每个节点可包含256TB的内存空间。

F、支持较远距离的传输。

G、支持公平仲裁原则，为每一种传输方式保证足够的传输带宽。

H、六线电缆具有电源线，可传输8～40V的直流电压。

（3）IEEE 1394的协议栈由3层组成：物理层、链路层和事务层，例外还有一个管理层。物理层和链路层由硬件构成，而事务层主要由软件实现。

A、物理层提供IEEE 1394的电气和机械接口，功能是重组字节流并将它们发送到目的节点上去。

B、链路层提供了给事务层确认的数据服务，包括：寻址、数据组帧和数据校验。

C、事务层为应用提供服务。

D、管理层定义了一个管理节点所使用的所有协议、服务以及进程。

23、电源接口

（1）DC-DC转换器有三种类型：

A、线性稳压器：产生较输入电压低的电压。

B、开关稳压器：能升高电压、降低电压或翻转输入电压。

C、充电泵：可以升高、降低或翻转输入电压，但电流驱动能力有限。

（2）任何变压器的转换过程都不具有100%的