WiMAX RF integration trend and smart division case analysis

The digital revolution has changed the way we communicate, work and travel by transforming people's relationships with the world around us. Digital electronic devices have transformed our world by supporting a vast network of portable, accessible, interactive communication media. However, the promising advantages of digital technology can only be manifested when it is as good as the capabilities of analog technology, in order to faithfully restore the digital language represented by "1" and "0" to the original analog signal.

Advances in the digital revolution have followed Moore's Law—the number of transistors in a chip doubles every 18 months. The analog technique follows Murphy's law to express it - if there is any error, then it must be the error of the law itself. Analog technology develops at a more regular pace, and it is not the enhancement of the process that governs its development, but the innovation in the modeling of circuits and physical transistors. These technological innovations incrementally improve performance, reduce power consumption, and increase integration from multiple dimensions.

The trend of integration varies with production and system maturity; in many cases, system approval and unit yield must not prove that development through multiple rounds of improvement is correct. In other applications such as base stations, instrumentation, and military, stringent performance requirements result in the need to implement discrete solutions. In some cases, such as cellular and Wi-Fi networks, which are widely accepted by users, competitive pressures force constant cost reductions. As technology deployment costs become more expensive (such as masking processes, test tools, and engineering costs), a return is needed to support the increase in related R&D investment. At the same time, competitive pressures force companies to invest heavily in the early stages of the standard lifecycle. If the market has taken off and a company's chipset is not ready, the result could be terrible.

In fact, in order to ensure that everything is ready when the market takes off, companies have to make upfront investments, and the amount of this investment is getting higher and higher; at the same time, customers require their suppliers to provide higher and higher performance. How to get an acceptable return from the R&D investment required by today's complex communication systems becomes a very difficult problem. Depending on the complexity of the SoC—the development cost of a 90nm linewidth manufacturing process can easily reach $10 million to $20 million, and sometimes even higher. The success of a new design depends on the perception of a market that is valuable to its IP, and the choice of partners to meet user needs in subsequent phases. There are fewer and fewer companies that can comprehensively address all aspects of system development issues. However, the focus on performance costs, time to market, and return on capital are the most fundamental requirements.

For emerging communication applications such as WiMAX, first generation systems have typically been developed using multi-chip ICs. The Media Access Controller (MAC) and modem sections can use FPGAs and off-the-shelf DSPs; the radio frequency (RF) section typically uses discrete components such as LNAs, mixers, and frequency synthesizers, using the bridge between the ADC and the DAC to bridge the modulus. . As production increases, digital logic is often integrated into a specific ASIC. In some cases, the ADC/DAC is also integrated into a digital ASIC for use with highly integrated RF solutions. For other applications where size is limited, such as cell phones and USB dongle, analog and digital function blocks need to be integrated, either in a multi-chip module package in a single system or on a single chip. There are many different ways to reduce chip area and reduce cost, and the current trend is to increase production, chip area and cost. In some cases, the cost is king, and even RF performance can be sacrificed (for example, some WLAN consumer applications), although users may not realize this. In other cases, chip area is the key, so the integration of functions is the driving force.

There are more than one secret to success. Companies have succeeded with many different integration methods and cost reduction strategies. Clearly, the choice of development solution must minimize the cost of electronic materials (eBOM), package size, and time to market. The smart design of the system division plays an important role in achieving success.

Integrating mixed-signal circuits into a digital ASIC can create many implementation challenges, create time-to-market issues, and, more importantly, introduce a time-of-risk risk to the product. Even though the mixed-signal core has been verified separately, its performance depends on the integration environment. Power supply wiring, parasitic capacitance, and process variations—those that are not important for pure digital chips—are now becoming more important.

It takes 2 to 6 months from FPGA-verified pure digital design to tape production, depending on complexity, design flow, and automation tools. On the other hand, the time required to complete the mixed signal design to the first tape is three times that of the digital design—assuming the analog core is off-the-shelf and the chosen manufacturing process is appropriate and validated. Since analog circuits with signal amplitudes in the microvolt range are particularly sensitive to noise generated by millions of transistor switches, special attention and multiple design and wiring checks are required, increasing the tape production cycle and the time required to provide samples.

The problem is not insurmountable. There are a number of ways to mitigate mutual interference in the circuit, but these methods require careful design of a custom mask layout that requires engineering time and resources. Of course, you need to develop a complete set of new core capabilities that may exceed the capabilities of the engineering team.

* The design and routing of the evaluation board also has a significant impact on the performance of the mixed signal portion of the device. The analog I/O on the reference design board is sensitive to external noise, so the power distribution of the mixed portion of the design needs to be highly isolated. Removing analog I/O minimizes noise coupling issues and can solve interface problems from analog cores from different vendors, such as RF chips and mixed-signal converter cores. For example, some existing ADC cores recommend a discrete 5V op amp drive buffer to achieve the performance specified in the product's instructions for use. For modems fabricated with smaller linewidth (eg 130nm or 90nm) processes, signal swings and common-mode levels must be reduced and matched when using RF chips from different vendors. These additional considerations also require valuable engineering resources.

In order to compete for market share, ranking second in the market usually means that product prices must be drastically cut. If you choose a pure digital or FPGA design flow, you can reduce the time to mass production of the product by 6 to 12 months.

Getting the right silicon is only the first step – putting the mixed-signal IC into production is facing its own challenges. Mixed signal circuits are sensitive to process variations such as thresholds, leakage, material resistance, and other process parameters. In general, as the performance of mixed signals decreases, system performance will also decrease. For mass-produced product markets, having multiple manufacturing bases is the fundamental guarantee for timely delivery and optimal cost. It does not matter when it comes to the choice of the manufacturer of the digital design, and the transfer of the production of mixed-signal circuits to different manufacturers is time consuming and may require extensive redesign and optimization skills. It is often difficult to integrate resources with the manufacturing processes of different manufacturers, even though they are used well elsewhere.